One type of Insulated Gate Bipolar Transistor (IGBT) involves an N+ type buffer layer or “field stop” layer disposed over a top layer of P type semiconductor substrate material. An N− type drift layer is disposed on the N+ type buffer layer. The N+ type buffer layer and the N− type drift layer may, for example, be epitaxially formed on the P type substrate. A P type body region is formed to extend down into the N− type drift layer from an upper semiconductor surface of the N− type drift layer. An N+ type emitter region extends from the surface down into the P type body region. A gate is disposed over a channel portion of the P type body region at the upper semiconductor surface. The channel portion is a surface portion of the P type body semiconductor material region that extends from the N+ type emitter region on one side to a portion of the N− type drift region at the other side. An emitter metal electrode is coupled to the N+ type emitter region and to the P type body region. A collector metal electrode is formed on the bottom surface of the P type substrate. A gate metal electrode on the top of the structure is coupled to the gate.
To turn on the IGBT device, a voltage on the gate induces inversion in the channel portion of the P type body region. A current flow in the form of electrons passes laterally from the N+ type emitter region, laterally through the channel portion, and to the N− type material of the N− type layer region at the semiconductor surface. From this surface region of the N− type drift layer, the path of electrons turns from lateral to vertical so that the electrons then pass vertically down through the N− type drift layer toward the P type collector layer. Some of the current carrying capacity of the device between the collector and emitter is due to this electron flow. In addition, holes are injected upward from the P type collector layer upward into the N+ buffer layer, and upward further into the N− drift layer. Another portion of the current carrying capacity of the device between the collector and emitter is therefore due to this hole flow. Because both holes and electrons are responsible for the current carrying capacity of the IGBT device, the device is a “bipolar” device.
As is understood in the art, increasing the concentration of charge carriers, both electrons and holes, in the N− type drift layer, and maintaining the proper balance and distribution of holes to electrons in the N− type drift layer, serves to reduce the collector-to-emitter saturation voltage VCE (SAT) of the IGBT device. The desired high concentration of charge carriers in the N− type drift layer is sometimes referred to as a “plasma” or an “electron/hole gas”. It may be desirable, however, in a given structure to reduce the hole injection efficiency of the junction between the P type collector layer and the N+ type buffer layer. Alternatively, or in addition, it may be desirable to maintain a high concentration of holes in the N− drift layer by reducing the escape of holes from the N− type drift layer into the P type body region. In one example, some of the cells at the upper surface of the IGBT are made to be so-called floating “dummy cells”. The floating P bodies of these cells are not coupled to the emitter electrode. Another top-side structure that can be employed to reduce the escape of holes is a floating P type well or layer. Such a floating P type well is an amount of floating P type semiconductor material at the upper semiconductor surface. Due to the inclusion of such floating P type well structures in the upper part of the IGBT, the overall proportion of hole absorbing P type body material at the upper part of the IGBT device is reduced. With such a floating P type well, electron injection in the upper part of the IGBT is adequate, but the absorption of holes out of the N− drift region is reduced because the proportion of the upper part of the IGBT that is hole absorbing P type body material is reduced. As a result, the rate of hole escape from the N− drift region is reduced and the hole concentration in the N− drift region during device on time is increased. Accordingly, the resistivity of the N− type drift layer is reduced and the voltage drop across the drift layer when the device is on is reduced.
In addition to IGBTs, there are other devices such as so-called MOS-Controlled Thyristor (MCT) devices and so-called Emitter Switched Thyristor (EST) devices. There are several variations of each of these devices, including dual channel EST devices. In one exemplary device considered here, a floating N+ type region is disposed at the upper semiconductor surface of the device so that this floating N+ type region extends into a floating P type region. The floating P type region extends into the upper surface of an N− type layer. The N− type layer is in turn disposed over a P type substrate layer. A vertically disposed NPN bipolar transistor structure therefore exists. The floating N+ type layer serves as the emitter. The floating P type region serves as the base. The N− type semiconductor material immediately beneath the floating P type region serves as the collector. In addition, a lateral field effect transistor structure is disposed at the top of the device to the side of the floating structures. When the device is to be turned on, a voltage on the gate of the lateral field effect transistor induces inversion in a channel region of the lateral field effect transistor. Electrons flow laterally through the channel, and then flow further laterally into the floating N+ type region and also into the floating P type region. This current into the floating structures causes the NPN bipolar transistor to turn on. As a result, the NPN bipolar transistor injects electrons downward into the N− type layer. A second bipolar transistor, which is a PNP bipolar transistor, is disposed on the bottom of the device. The NPN bipolar transistor and the PNP bipolar transistor are interconnected in such a way that they are referred to as a thyristor. The floating P type region serves at the collector of this second PNP transistor. The N− type layer beneath the P type region serves as the base of this second PNP transistor. The P type substrate serves as the emitter of this second PNP transistor. In the case of an MCT device, once both bipolar transistors turn on, they create a latch up condition such that the gate has no further control on the collector-to-emitter current. This is proper for thyristor operation, but is unacceptable in an IGBT.
An improved IGBT structure and device is desired that has a high concentration of electrons and holes its drift region during its on state, but yet turns off fast and does not suffer latchup and other problems.